IP 组合
Highly efficient 4-issue, dual-mac superscalar DSP core with optional caches based on first generation ZSP architecture

ZSP400 is an energy efficient DSP core ideal for voice and audio applications that require a balance between area, performance and power. Target products include tablets, handsets, smart phones, toys, hearing aids, VoIP phones, audio players, VoIP gateway and other embedded DSP and control applications.

For cost-sensitive products, ZSP400 can serve as both a power efficient DSP as well as the controller, eliminating the need for an expensive microcontroller in the system.

  • Dual-mac superscalar DSP core capable of executing up to 4 instructions per cycle
  • High precision multiplication with 40 bit accumulation
  • Compact instruction set
  • Most instructions execute in 1 ZSP clock cycle, resulting in the best performance and power efficiency
  • Up to 64KW each of tightly coupled instruction and data memory
  • Optional Instruction cache 
  • AHB interface
  • Multiple low power modes of operation
  • Integrated low latency interrupt controller, timers and optional peripherals
  • Based on scalable ZSP superscalar architecture – reuse software as application evolves
  • Compiler friendly architecture - orthogonal instruction set
  • Very good code density
  • Optimal balance of performance, power and area to meet the most stringent application requirements.
  • Easy to use, easy to program
  • Broad portfolio of optimized field proven application software, cutting edge development tools, complete ecosystem and exceptional services to help users from concept to market.

The ZSP400 is supported by VeriSilicon’s powerful, easy to use ZView IDE based on industry standard Eclipse and GNU tools. ZView also includes a fast cycle accurate simulator and profiling and data graphing tools that help reduce time to market.

VeriSilicon also offers ZSP test chips and evaluation boards. ZSP cores are also supported by third party vendors providing RTOS and ESL tools.

A wide portfolio of optimized, field-proven software is readily available for the ZSP400. Software deliverables are complete with API specification and example usage, allowing developers to focus their resources on system level integration.

The ZSP400 core is available for licensing. Deliverables include a fully synthesizable design, ZView tools and relevant application software.

VeriSilicon has offices worldwide with very experienced support engineers to help with any issue related to ZSP hardware or software deliverables.

VeriSilicon also offers hardware and software design services as part of its Design/Turnkey services.