平台化芯片设计服务
成功案例
 

VeriSilicon has proven its SoC designs in hundreds of customers’ first silicon successes. We have extensive experience and value in chip characterization and qualification to mass production with a strong operations team.

In one example, VeriSilicon successfully delivered a SoC design from 0.18um to 28nm technology, from spec to GDS, RTL to GDS and gate-level netlist to GDS for mass production. VeriSilicon design methodologies are based on experience of the challenges in multi-million gates designs, GHz operating frequency, noise coupling, static and dynamic IR drop, at-speed DFT/memory BIST, low power ATPG, multi-power domains, dynamic voltage frequency scaling (DVFS), high-speed package design, SiP, design for manufacturing (DFM) requirements and SoC verification.

VeriSilicon has also delivered many SoC projects on first silicon successes with in-house digital SoC platform (core + IP).

DTV Netlist-to-GDS
Kinect Netlist-to-GDS
  Game-player Spec-to-GDS
Gravity Sensor Netlist-to-GDS
Tab/mobile Spec-to-GDS