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4G Wireless technologies like WiMax, LTE, LTE-A and beyond are based on advanced technologies such as OFDM (Orthogonal Frequency Division Multiplexing), MIMO (Multiple Input Multiple Output), coordinated Multi-point and carrier aggregation, etc. LTE/LTE-A solution engineers, especially UE (User Equipment) BB (Base Band) solution engineers, are facing the tremendous challenge of achieving high throughput at low power consumption and at low cost while meeting the diverse requirements of various use-case scenarios with one homogenized flexible modem design.

Traditionally, wireless BB solution incorporates a general purpose DSP (Digital Signal Processor) working with single or multiple HW (Hardware) accelerators. However, in this architecture the DSP lacks specific optimizations for wireless functions. Furthermore, the software and hardware partitioning can vary based on requirements which complicate the task of system level optimization. For example, an architecture can cope with 2G or 3G BB processing well but may not scale up to handle LTE/LTE-A processing requirements.

In recent LTE solutions, more tasks are assigned to hardware and the design is dominated by hardware accelerators. A hardware dominant design that targets the worst case scenario may be over designed for actual use scenarios consequently leading to inefficiencies. Also, flexibility is lost with the rigidity imposed by a preconfigured hardware only solution. Such solutions also do not allow one to scale their designs easily by leveraging the advances in process technologies.

These challenges call for an efficient DSP that offers the power/performance balance as well as the flexibility needed to adapt to the needs of next generation wireless communication standards.. VeriSilicon’s ZSP G4 architecture, featuring optimized instruction set for wireless signal processing and low power micro-architecture targeted for mobile applications, addresses these needs. A scalable high performance architecture with vector computation capabilities and ability to easily interface to desired hardware accelerators enables designers to maintain an efficient processor centric SoC (System on Chip) architecture with adequate flexibility.

VeriSilicon offers an innovative wireless platform solution based on ZSP G4. This scalable platform can support multi-standard and multi-mode with excellent power and cost efficiencies. The platform features comprehensive bus management and tunable system architecture. With ZSP G4 as the processing engine and its ability to interface to customer specific hardware, this platform allows for unique product differentiations. The platform also includes a set of optimized wireless signal processing libraries to shortest product design cycles.

The application of the platform is not limited to multi-mode wireless communications, it can be applied to smart terminal and Femto cell, smart grid, biomedicine, M2M embedded mobile infrastructure, and so on.

Please contact your nearest VeriSilicon office for further details or to discuss any particular requirements.