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The mobile communications world is changing. There are many standards which are incompatible with each other, whether it was back in the days of 2G or currently in 3G. However, all are converging into one direction – LTE (Long Term Evolution) and LTE-A (LTE-Advance) since the completion of 3GPP Standard Rel.10 in March 2011. When the Rel.10 standard begins to demonstrate the amazingly fast 3Gbps (Giga bits per second) bit rate, it opens up a huge new world of opportunities for wireless applications, but it also presents some design challenges to engineers in achieving this goal.

 

To address this challenge, VeriSilicon has developed a new and innovative DSP for next generation wireless communication standards. VeriSilicon ZSP is optimized and proven for wireless signal processing in mobile applications.

With the VeriSilicon Wireless SDR (software defined radio) platform, the goal of enabling SDR on UE (user-equipment) becomes reality. This is a single platform that can support multi-standard and multi-mode with high power and cost efficiencies. 

LTE and LTE-A are based on advanced technologies such as OFDM (Orthogonal Frequency Division Multiplexing), MIMO (Multiple Input Multiple Output), coordinated multi-point and carrier aggregation. LTE/LTE-A solution engineers, especially for UE (user-equipment) BB (base band) solutions, are facing a combination of tremendous challenges: achieving high throughput at low power consumption and at low cost; and meeting the requirements of diverse use scenarios by one homogenized modem design.

Traditionally, wireless BB solutions incorporate a GP (General Purpose) DSP (Digital Signal Processor) working with single or multiple HW (hardware) accelerators. However, in this architecture the GP DSP lacks optimization for wireless. Furthermore, the SW (software) and HW task partitioning can have many varieties and therefore makes system level optimization very complicated.

This architecture can cope with 2G BB processing well but it can no longer deal with LTE/LTE-A due to the low performance of the GP DSP.

So in some recent LTE solutions, more tasks are assigned to HW instead of DSP, and HW accelerators become dominant compared to the weakened DSP in the architecture. Such designs target a worst case scenario - however, this is often over-designed for actual use scenarios. The more the tasks are hardened, the more rigid the solution is. Short of feasibilities and flexibilities and disproportional power reduction along with process shrink, the barriers are that this solution cannot break down before entering actual service. 

So what is the solution? An innovative DSP for next generation wireless.

To differ from traditional homogenous multi-core processors, a new and innovative DSP for next generation wireless communication standard is needed. VeriSilicon ZSP, with its optimized and proven ISA (instruction set architecture) for wireless signal processing and renovated low power micro-architecture for mobile applications, enables enormous parallel computation matching with HW-oriented performance, and maintains processor centric SoC architecture with sufficient flexibilities and efficiencies. It is developed using innovative development methodology and ideally suited for various applications.

Established on the foundation of ZSP is VeriSilicon’s innovative SDR (software defined radio) platform. SDR was first introduced in GSM base stations in 1998 and has been widely adopted in infrastructures since then but yet to have any successful track record in commercial UE, due to the bottle-neck of power consumption and solution cost.

Now, with the VeriSilicon Wireless SDR platform, the dream of SDR on UE becomes reality. This is a single platform that can support multi-standard and multi-mode with high power and cost efficiencies. The platform features tunable system architecture and process engine to cater for different use scenarios and product differentiations.

It includes miscellaneous and complete wireless signal processing libraries to achieve best optimization and helps shorten your design cycle. It provides proven reference designs for LTE/LTE-A application and an FPGA prototype for demonstration to minimize your technical risk.

ESL virtual platform and methodology for system design and verification are highlights of the platform. The platform is not limited to multi-mode wireless communications. It can be applied to smart terminals and Femto cells, smart grids, biomedicine, M2M embedded mobile infrastructure, and so on.

 

 

Please contact your nearest VeriSilicon representative for further details and to discuss your specific requirements.