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Hantro VC9000E Multi-format Video Encoder IP

Hantro VC9000E enables 8K encoding with a smallest silicon and high video quality single-core solution, or multi-core solution up to 8K@120fps, supporting AV1, HEVC, H.264, VP9 video formats and JPEG.

VeriSilicon's Hantro VC9000E is based on silicon-proven VeriSilicon Hantro technology that has been widely developed in use cases that demand the most performance and quality from data centers to low power AIOT devices, in millions of smartphones, tablets, ARVR, automotive, set-top boxes, DTV’s and video cameras worldwide.

Hantro VC9000E provides semiconductor manufacturers a minimum risk solution for integrating high-performance video capability into their chips.

VC9000E

Video Format
Unified architecture supports multiple formats
AV1 main profile
HEVC Main10, Main, and Main Still Profiles
H.264 Baseline, Main and High, High10
VP9 profile 0 and profile 2 (10-bit)
JPEG
High performance and throughput
Up to 8K@30fps performance with a single-core
Up to 8K@120fps with multiple cores
Up to 800 cycles BUS latency tolerance without performance impact
Up to 256 streams in a single device (with built-in RISC-V)
Maximally offloads the system CPU
Leading in PPA/Die Area for high performance solution
High encoding quality
Leading PSNR BDR data in data center video processors
Visual quality optimization for gaming video
User Controlled Intelligent encoding capability with AI by FLEXA API
Features for different application requirements
Inline preprocessing features and OSD blending
DDR efficiency and bandwidth saving
Low-latency encoding
Security and DRM support
Flexible HW configuration
HW configuration can be done for most video formats
Typical 1-4 cores or more in a device
Best balance between PPA and video quality for different targets
Configurable on quality level, feature set, and different performance
Controllable balance between performance and quality
Bandwidth saving by reference frame & input frame compression
Optional MMU, encryption, and RISC-V core
Video Formats AV1, HEVC, H264, VP9, JPEG
Bit-depth  8-bit, 8/10bits
DDR interface Lossless reference frame compression, and Resolution adaptive line buffer management for BW saving
DEC400 integration
Configurable bus burst size
Async. AXI bus clock
32/64 bits DDR address space
Throughput/DieArea 

VCMD solution can greatly decrease SW workload (without RISC-V)

Built-in RISC-V core can maximally offloading the host CPU

Pre-processor

Down-scaling

RGB-to-YUV color conversion

OSD blending

Latency Super low latency line buffer
input mode, 64 lines delay for input
Encoding tools B Frame support for HEVC/H264
CTU/MB RC to control bit rate accuracy
JPEG lossless, JPEG422
HEVC/H264 MB statistics reporting
ROI-map: qp offset range extend to +/- 32
IPCM rectangle and IPCM map mode
Gray picture encoding for HEVC/H264/JPEG
Configurable ME search range
Global Motion Vector setting
SSIM HW engine
TU32x32 support

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