ZSP5000 is a programmable Vector Digital Signal Processor Core for high performance computer vision and image processing applications. The programmer friendly architecture offers an orthogonal instruction set that greatly simplifies complex image processing algorithms of programming, as well as control code with a high-performance C/C++ compiler.
ZSP5000 is ideally suited for vision and image processing applications that need software flexibility, as well as high performance. It can achieve up to 100 GMacs/s worst case performance in 14nm technology. ZSP5000 is supported by a comprehensive software development toolkit - ZView, which includes a vectorizing C/C++ compiler, rich support for intrinsics, and support for multi-core debug. VeriSilicon offers a broad portfolio of optimized software to help product developers from concept to market.
ZSP5000 is supported by VeriSilicon’s powerful, easy to use ZView IDE that includes a complete software development tool chain, instruction accurate and fast cycle accurate simulators, profiling & debug tools. JTAG emulator probes and FPGA evaluation boards are also available.
A wide portfolio of optimized, field-proven software with API specification and example usage are also available, so developers can focus their resources on system level integration. Customers can also run standard reference C/C++ code to get up and going on ZSP5000 in no time.
The ZSP5000 core is available for licensing. Deliverables include a fully synthesizable design, ZView tools and relevant application software.
VeriSilicon has offices worldwide with very experienced support engineers to help with any issue related to ZSP hardware or software deliverables.
VeriSilicon also offers hardware and software design services as part of its Design/Turnkey services.